Home
last modified time | relevance | path

Searched refs:CLK_PCLK_AUD_UART (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dsamsung,exynos5433-lpass.yaml110 clocks = <&cmu_aud CLK_PCLK_AUD_UART>,
/openbmc/linux/include/dt-bindings/clock/
H A Dexynos5433.h795 #define CLK_PCLK_AUD_UART 33 macro
/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433.dtsi1923 clocks = <&cmu_aud CLK_PCLK_AUD_UART>,
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos5433.c3038 GATE(CLK_PCLK_AUD_UART, "pclk_aud_uart", "div_aclk_aud",