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Searched refs:CLK_MSCL0 (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/gpu/
H A Dsamsung-scaler.yaml77 clocks = <&clock CLK_MSCL0>;
/openbmc/linux/include/dt-bindings/clock/
H A Dexynos5420.h129 #define CLK_MSCL0 381 macro
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5420.dtsi876 clocks = <&clock CLK_MSCL0>;
1045 clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>;
1076 clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>;
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos5420.c1295 GATE(CLK_MSCL0, "mscl0", "aclk400_mscl", GATE_IP_MSCL, 0, 0, 0),