Searched refs:CLK_MOUT_MFC_PLL_DIV2 (Results 1 – 3 of 3) sorted by relevance
211 #define CLK_MOUT_MFC_PLL_DIV2 10 macro
299 assigned-clock-parents = <&cmu_mif CLK_MOUT_MFC_PLL_DIV2>;
1133 MUX(CLK_MOUT_MFC_PLL_DIV2, "mout_mfc_pll_div2", mout_mfc_pll_div2_p,