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Searched refs:CLK_MOUT_BUS_PLL_DIV2 (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433-tm2e.dts47 <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
H A Dexynos5433-tm2.dts48 <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
/openbmc/linux/include/dt-bindings/clock/
H A Dexynos5433.h212 #define CLK_MOUT_BUS_PLL_DIV2 11 macro
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos5433.c1135 MUX(CLK_MOUT_BUS_PLL_DIV2, "mout_bus_pll_div2", mout_bus_pll_div2_p,