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Searched refs:CLK_MON_R (Results 1 – 1 of 1) sorted by relevance

/openbmc/linux/drivers/clk/renesas/
H A Drzg2l-cpg.c51 #define CLK_MON_R(reg) (0x180 + (reg)) macro
926 error = readl_poll_timeout_atomic(priv->base + CLK_MON_R(reg), value, in rzg2l_mod_clock_endisable()
991 value = readl(priv->base + CLK_MON_R(clock->off)); in rzg2l_mod_clock_is_enabled()