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Searched refs:CLK_MM_SMI_LARB5 (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt6797-mm.c35 GATE_MM0(CLK_MM_SMI_LARB5, "mm_smi_larb5", "mm_sel", 2),
H A Dclk-mt2712-mm.c91 GATE_MM1(CLK_MM_SMI_LARB5, "mm_smi_larb5", "mm_sel", 22),
/openbmc/linux/include/dt-bindings/clock/
H A Dmt6797-clk.h217 #define CLK_MM_SMI_LARB5 3 macro
H A Dmt2712-clk.h347 #define CLK_MM_SMI_LARB5 46 macro
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt2712e.dtsi1037 clocks = <&mmsys CLK_MM_SMI_LARB5>,
1038 <&mmsys CLK_MM_SMI_LARB5>;