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Searched refs:CLK_MM_IMG_IMG_DL_ASYNC_TOP (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8365-mm.c66 GATE_MM0(CLK_MM_IMG_IMG_DL_ASYNC_TOP, "mm_dl_async_top", "mm_sel", 30),
/openbmc/linux/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h335 #define CLK_MM_IMG_IMG_DL_ASYNC_TOP 30 macro