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Searched refs:CLK_MDMA1 (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dexynos5250.h75 #define CLK_MDMA1 271 macro
H A Dexynos5420.h151 #define CLK_MDMA1 442 macro
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos5250.c553 GATE(CLK_MDMA1, "mdma1", "div_aclk266", GATE_IP_GEN, 4, 0, 0),
H A Dclk-exynos5420.c1136 GATE(CLK_MDMA1, "mdma1", "mout_user_aclk266", GATE_IP_GEN, 4, 0, 0),
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5250.dtsi733 clocks = <&clock CLK_MDMA1>;
H A Dexynos5420.dtsi582 clocks = <&clock CLK_MDMA1>;