Searched refs:CLK_MDMA0 (Results 1 – 6 of 6) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | exynos5250.h | 150 #define CLK_MDMA0 346 macro
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| H A D | exynos5420.h | 170 #define CLK_MDMA0 473 macro
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| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-exynos5250.c | 447 GATE(CLK_MDMA0, "mdma0", "div_aclk266", GATE_IP_ACP, 1, 0, 0),
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| H A D | clk-exynos5420.c | 932 GATE(CLK_MDMA0, "mdma0", "aclk266_g2d", GATE_IP_G2D, 1, 0, 0),
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| /openbmc/linux/arch/arm/boot/dts/samsung/ |
| H A D | exynos5250.dtsi | 724 clocks = <&clock CLK_MDMA0>;
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| H A D | exynos5420.dtsi | 573 clocks = <&clock CLK_MDMA0>;
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