Searched refs:CLK_GSCL_WB (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | exynos5250.h | 65 #define CLK_GSCL_WB 261 macro
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| H A D | exynos5420.h | 163 #define CLK_GSCL_WB 464 macro
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| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-exynos5250.c | 529 GATE(CLK_GSCL_WB, "gscl_wb", "div_gscl_wb", GATE_IP_GSCL, 6, 0, 0),
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| H A D | clk-exynos5420.c | 1170 GATE(CLK_GSCL_WB, "gscl_wb", "sclk_gscl_wb", GATE_IP_GSCL1, 13,
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