Searched refs:CLK_GSCL_WA (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | exynos5250.h | 64 #define CLK_GSCL_WA 260 macro
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| H A D | exynos5420.h | 162 #define CLK_GSCL_WA 463 macro
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| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-exynos5250.c | 528 GATE(CLK_GSCL_WA, "gscl_wa", "div_gscl_wa", GATE_IP_GSCL, 5, 0, 0),
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| H A D | clk-exynos5420.c | 1168 GATE(CLK_GSCL_WA, "gscl_wa", "sclk_gscl_wa", GATE_IP_GSCL1, 12,
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