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Searched refs:CLK_GSCL0 (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dexynos5250.h60 #define CLK_GSCL0 256 macro
H A Dexynos5420.h164 #define CLK_GSCL0 465 macro
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5250.dtsi743 clocks = <&clock CLK_GSCL0>;
1026 clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
H A Dexynos5420.dtsi806 clocks = <&clock CLK_GSCL0>;
1023 clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos5250.c518 GATE(CLK_GSCL0, "gscl0", "mout_aclk266_gscl_sub", GATE_IP_GSCL, 0, 0,
H A Dclk-exynos5420.c1252 GATE(CLK_GSCL0, "gscl0", "aclk300_gscl", GATE_IP_GSCL0, 0, 0, 0),