Searched refs:CLK_GOUT_FSYS0_PCIE_GEN3_2L0_X1_SLV_ACLK (Results 1 – 2 of 2) sorted by relevance
191 #define CLK_GOUT_FSYS0_PCIE_GEN3_2L0_X1_SLV_ACLK 8 macro
1198 GATE(CLK_GOUT_FSYS0_PCIE_GEN3_2L0_X1_SLV_ACLK,