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Searched refs:CLK_G3D (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dexynos5250.h153 #define CLK_G3D 349 macro
H A Ds5pv210.h112 #define CLK_G3D 94 macro
H A Dexynos4.h114 #define CLK_G3D 276 macro
H A Dexynos5420.h182 #define CLK_G3D 501 macro
H A Dexynos3250.h188 #define CLK_G3D 182 macro
/openbmc/linux/drivers/clk/samsung/
H A Dclk-s5pv210.c630 GATE(CLK_G3D, "g3d", "dout_hclkm", CLK_GATE_IP0, 8, 0, 0),
692 GATE(CLK_G3D, "g3d", "dout_hclkd", CLK_GATE_IP0, 8, 0, 0),
H A Dclk-exynos5250.c549 GATE(CLK_G3D, "g3d", "div_aclk400_g3d", GATE_IP_G3D, 0,
H A Dclk-exynos3250.c618 GATE(CLK_G3D, "g3d", "div_aclk_200", GATE_IP_G3D, 0, 0, 0),
H A Dclk-exynos4.c732 GATE(CLK_G3D, "g3d", "aclk200", GATE_IP_G3D, 0, 0, 0),
H A Dclk-exynos5420.c1268 GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9,
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos4.dtsi401 * CLK_G3D is not actually bus clock but a IP-level clock.
404 clocks = <&clock CLK_G3D>,
H A Dexynos3250.dtsi651 clocks = <&cmu CLK_G3D>,
H A Dexynos5250.dtsi345 clocks = <&clock CLK_G3D>;
H A Dexynos5420.dtsi830 clocks = <&clock CLK_G3D>;