Searched refs:CLK_DIV_LEX_VAL (Results 1 – 2 of 2) sorted by relevance
/openbmc/u-boot/arch/arm/mach-exynos/ | ||
H A D | exynos5_setup.h | 201 #define CLK_DIV_LEX_VAL 0x10 macro |
H A D | clock_init_exynos5.c | 710 writel(CLK_DIV_LEX_VAL, &clk->div_lex); in exynos5250_system_clock_init() |