Home
last modified time | relevance | path

Searched refs:CLK_DIV_LEX_VAL (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dexynos5_setup.h201 #define CLK_DIV_LEX_VAL 0x10 macro
H A Dclock_init_exynos5.c710 writel(CLK_DIV_LEX_VAL, &clk->div_lex); in exynos5250_system_clock_init()