Searched refs:CLK_DIV_LCD0_VAL (Results 1 – 2 of 2) sorted by relevance
| /openbmc/u-boot/arch/arm/mach-exynos/ | ||
| H A D | clock_init_exynos4.c | 76 writel(CLK_DIV_LCD0_VAL, &clk->div_lcd0); in system_clock_init() |
| H A D | exynos4_setup.h | 331 #define CLK_DIV_LCD0_VAL (FIMD0_RATIO) macro |