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Searched refs:CLK_DIV_G3D_VAL (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock_init_exynos4.c75 writel(CLK_DIV_G3D_VAL, &clk->div_g3d); in system_clock_init()
H A Dexynos4_setup.h316 #define CLK_DIV_G3D_VAL (G3D_RATIO) macro