Home
last modified time | relevance | path

Searched refs:CLK_BUS_EPHY (Results 1 – 10 of 10) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Dsun8i-v3s-ccu.h74 #define CLK_BUS_EPHY 43 macro
H A Dsun8i-h3-ccu.h95 #define CLK_BUS_EPHY 67 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dsun8i-v3s-ccu.h74 #define CLK_BUS_EPHY 43 macro
H A Dsun8i-h3-ccu.h99 #define CLK_BUS_EPHY 67 macro
/openbmc/u-boot/drivers/clk/sunxi/
H A Dclk_h3.c37 [CLK_BUS_EPHY] = GATE(0x070, BIT(0)),
/openbmc/linux/drivers/clk/sunxi-ng/
H A Dccu-sun8i-v3s.c530 [CLK_BUS_EPHY] = &bus_ephy_clk.common.hw,
611 [CLK_BUS_EPHY] = &bus_ephy_clk.common.hw,
H A Dccu-sun8i-h3.c711 [CLK_BUS_EPHY] = &bus_ephy_clk.common.hw,
833 [CLK_BUS_EPHY] = &bus_ephy_clk.common.hw,
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-v3s.dtsi575 clocks = <&ccu CLK_BUS_EPHY>;
H A Dsunxi-h3-h5.dtsi563 clocks = <&ccu CLK_BUS_EPHY>;
/openbmc/u-boot/arch/arm/dts/
H A Dsunxi-h3-h5.dtsi533 clocks = <&ccu CLK_BUS_EPHY>;