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Searched refs:CLK_BASE__INST5_SEG0 (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dcyan_skillfish_ip_offset.h203 #define CLK_BASE__INST5_SEG0 0x0001B000 macro
H A Dnavi10_ip_offset.h218 #define CLK_BASE__INST5_SEG0 0 macro
H A Ddimgrey_cavefish_ip_offset.h251 #define CLK_BASE__INST5_SEG0 0x0001B200 macro
H A Dnavi12_ip_offset.h267 #define CLK_BASE__INST5_SEG0 0x00017E00 macro
H A Dnavi14_ip_offset.h267 #define CLK_BASE__INST5_SEG0 0x00017E00 macro
H A Dvega20_ip_offset.h245 #define CLK_BASE__INST5_SEG0 0 macro
H A Dsienna_cichlid_ip_offset.h274 #define CLK_BASE__INST5_SEG0 0x0001B200 macro
H A Dbeige_goby_ip_offset.h280 #define CLK_BASE__INST5_SEG0 0x0001B200 macro
H A Drenoir_ip_offset.h349 #define CLK_BASE__INST5_SEG0 0 macro
H A Dvangogh_ip_offset.h375 #define CLK_BASE__INST5_SEG0 0x0001B200 macro
H A Dyellow_carp_offset.h322 #define CLK_BASE__INST5_SEG0 0x0001B200 macro
H A Darct_ip_offset.h337 #define CLK_BASE__INST5_SEG0 0x00013720 macro
H A Daldebaran_ip_offset.h352 #define CLK_BASE__INST5_SEG0 0x0001B200 macro