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Searched refs:CLK_APB1_UART2 (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dsun5i-ccu.h56 #define CLK_APB1_UART2 61 macro
H A Dsun4i-a10-ccu.h119 #define CLK_APB1_UART2 90 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dsun5i-ccu.h65 #define CLK_APB1_UART2 61 macro
H A Dsun4i-a10-ccu.h119 #define CLK_APB1_UART2 90 macro
/openbmc/u-boot/drivers/clk/sunxi/
H A Dclk_a10s.c29 [CLK_APB1_UART2] = GATE(0x06c, BIT(18)),
H A Dclk_a10.c35 [CLK_APB1_UART2] = GATE(0x06c, BIT(18)),
/openbmc/linux/drivers/clk/sunxi-ng/
H A Dccu-sun5i.c691 [CLK_APB1_UART2] = &apb1_uart2_clk.common.hw,
825 [CLK_APB1_UART2] = &apb1_uart2_clk.common.hw,
935 [CLK_APB1_UART2] = &apb1_uart2_clk.common.hw,
H A Dccu-sun4i-a10.c1142 [CLK_APB1_UART2] = &apb1_uart2_clk.common.hw,
1300 [CLK_APB1_UART2] = &apb1_uart2_clk.common.hw,
/openbmc/u-boot/arch/arm/dts/
H A Dsun5i.dtsi620 clocks = <&ccu CLK_APB1_UART2>;
H A Dsun4i-a10.dtsi890 clocks = <&ccu CLK_APB1_UART2>;
H A Dsun7i-a20.dtsi1084 clocks = <&ccu CLK_APB1_UART2>;
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun5i.dtsi688 clocks = <&ccu CLK_APB1_UART2>;
H A Dsun4i-a10.dtsi976 clocks = <&ccu CLK_APB1_UART2>;
H A Dsun7i-a20.dtsi1343 clocks = <&ccu CLK_APB1_UART2>;