CLKMGR_SDRPLLGRP_DDR2XDQSCLK_PHASE_OFFSET (reference) in projects: openbmc

Searched refs:CLKMGR_SDRPLLGRP_DDR2XDQSCLK_PHASE_OFFSET (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-socfpga/
H A D	wrap_pll_config.c	`107 CLKMGR_SDRPLLGRP_DDR2XDQSCLK_PHASE_OFFSET) \|`
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A D	clock_manager_gen5.h	`308 #define CLKMGR_SDRPLLGRP_DDR2XDQSCLK_PHASE_OFFSET 9 macro`