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Searched refs:CLKMGR_SDMMC_CLK_SRC_F2S (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h280 #define CLKMGR_SDMMC_CLK_SRC_F2S 0x0 macro
/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_gen5.c446 if (reg == CLKMGR_SDMMC_CLK_SRC_F2S) { in cm_get_mmc_controller_clk_hz()