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Searched refs:CLKMGR_MAINPLL_VCO0_PSRC_F2S (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_arria10.h117 #define CLKMGR_MAINPLL_VCO0_PSRC_F2S 0x2 macro
/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_arria10.c251 case CLKMGR_MAINPLL_VCO0_PSRC_F2S: in cm_calc_handoff_main_vco_clk_hz()
500 case CLKMGR_MAINPLL_VCO0_PSRC_F2S: in cm_calc_safe_pll_numer()