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Searched refs:CLKMGR_MAINPLL_MPUCLK_CNT_MSK (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_arria10.c307 clk_hz /= (main_cfg->mpuclk & CLKMGR_MAINPLL_MPUCLK_CNT_MSK) in cm_calc_handoff_mpu_clk_hz()
314 CLKMGR_MAINPLL_MPUCLK_CNT_MSK) + 1; in cm_calc_handoff_mpu_clk_hz()
447 mask = CLKMGR_MAINPLL_MPUCLK_CNT_MSK; in cm_calculate_numer()
459 mask = CLKMGR_MAINPLL_MPUCLK_CNT_MSK; in cm_calculate_numer()
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_arria10.h160 #define CLKMGR_MAINPLL_MPUCLK_CNT_MSK 0x000003ff macro