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Searched refs:CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_PRE_DIV (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_main.c498 CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_PRE_DIV | in sparx5_init_coreclock()
H A Dsparx5_main_regs.h2258 #define CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_PRE_DIV GENMASK(10, 8) macro
2260 FIELD_PREP(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_PRE_DIV, x)
2262 FIELD_GET(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_PRE_DIV, x)