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Searched refs:CLKCTRL_ENET_TIME_SEL_RMII_CLK (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/board/ppcag/bg0900/
H A Dbg0900.c62 writel(CLKCTRL_ENET_TIME_SEL_RMII_CLK | CLKCTRL_ENET_CLK_OUT_EN, in board_eth_init()
/openbmc/u-boot/board/schulercontrol/sc_sps_1/
H A Dsc_sps_1.c79 CLKCTRL_ENET_TIME_SEL_RMII_CLK | CLKCTRL_ENET_CLK_OUT_EN); in board_eth_init()
/openbmc/u-boot/board/freescale/mx28evk/
H A Dmx28evk.c109 writel(CLKCTRL_ENET_TIME_SEL_RMII_CLK | CLKCTRL_ENET_CLK_OUT_EN, in board_eth_init()
/openbmc/u-boot/arch/arm/include/asm/arch-mxs/
H A Dregs-clkctrl-mx28.h224 #define CLKCTRL_ENET_TIME_SEL_RMII_CLK (0x2 << 19) macro