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Searched refs:CLEAR0 (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/arch/mips/loongson64/
H A Dsmp.c227 (SMP_CORE_GROUP0_BASE + SMP_CORE0_OFFSET + CLEAR0); in ipi_clear0_regs_init()
229 (SMP_CORE_GROUP0_BASE + SMP_CORE1_OFFSET + CLEAR0); in ipi_clear0_regs_init()
231 (SMP_CORE_GROUP0_BASE + SMP_CORE2_OFFSET + CLEAR0); in ipi_clear0_regs_init()
233 (SMP_CORE_GROUP0_BASE + SMP_CORE3_OFFSET + CLEAR0); in ipi_clear0_regs_init()
235 (SMP_CORE_GROUP1_BASE + SMP_CORE0_OFFSET + CLEAR0); in ipi_clear0_regs_init()
237 (SMP_CORE_GROUP1_BASE + SMP_CORE1_OFFSET + CLEAR0); in ipi_clear0_regs_init()
239 (SMP_CORE_GROUP1_BASE + SMP_CORE2_OFFSET + CLEAR0); in ipi_clear0_regs_init()
241 (SMP_CORE_GROUP1_BASE + SMP_CORE3_OFFSET + CLEAR0); in ipi_clear0_regs_init()
243 (SMP_CORE_GROUP2_BASE + SMP_CORE0_OFFSET + CLEAR0); in ipi_clear0_regs_init()
245 (SMP_CORE_GROUP2_BASE + SMP_CORE1_OFFSET + CLEAR0); in ipi_clear0_regs_init()
[all …]
H A Dsmp.h24 #define CLEAR0 0x0c macro