Home
last modified time | relevance | path

Searched refs:CLASS_PE0_QB_DM_ADDR1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/include/net/pfe_eth/pfe/cbus/
H A Dclass_csr.h32 #define CLASS_PE0_QB_DM_ADDR1 (CLASS_CSR_BASE_ADDR + 0x024) macro
/openbmc/u-boot/drivers/net/pfe_eth/
H A Dpfe_hw.c802 writel(CLASS_PE0_QB_DM_ADDR1_VAL, CLASS_PE0_QB_DM_ADDR1); in class_set_config()