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Searched refs:CLASS_PE0_QB_DM_ADDR0 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/include/net/pfe_eth/pfe/cbus/
H A Dclass_csr.h30 #define CLASS_PE0_QB_DM_ADDR0 (CLASS_CSR_BASE_ADDR + 0x020) macro
/openbmc/u-boot/drivers/net/pfe_eth/
H A Dpfe_hw.c801 writel(CLASS_PE0_QB_DM_ADDR0_VAL, CLASS_PE0_QB_DM_ADDR0); in class_set_config()