Searched refs:CICR3_VSW (Results 1 – 1 of 1) sorted by relevance
108 #define CICR3_VSW (0x3f << 10) /* Vertical sync pulse width mask */ macro168 #define CICR3_VSW_VAL(x) (((x) << 11) & CICR3_VSW) /* Vertical sync pulse width */