Home
last modified time | relevance | path

Searched refs:CHL_INT1_MSK (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/scsi/hisi_sas/
H A Dhisi_sas_v1_hw.c181 #define CHL_INT1_MSK (PORT_BASE + 0x1c0) macro
1700 hisi_sas_phy_write32(hisi_hba, i, CHL_INT1_MSK, 0x17fff); in interrupt_openall_v1_hw()
H A Dhisi_sas_v3_hw.c283 #define CHL_INT1_MSK (PORT_BASE + 0x1c4) macro
621 hisi_sas_phy_write32(hisi_hba, i, CHL_INT1_MSK, 0xf2057fff); in interrupt_enable_v3_hw()
1771 u32 irq_msk = hisi_sas_phy_read32(hisi_hba, phy_no, CHL_INT1_MSK); in handle_chl_int1_v3_hw()
2676 hisi_sas_phy_write32(hisi_hba, i, CHL_INT1_MSK, 0xffffffff); in interrupt_disable_v3_hw()
2983 HISI_SAS_DEBUGFS_REG(CHL_INT1_MSK),
H A Dhisi_sas_v2_hw.c246 #define CHL_INT1_MSK (PORT_BASE + 0x1c4) macro
1255 hisi_sas_phy_write32(hisi_hba, i, CHL_INT1_MSK, 0xff857fff); in init_reg_v2_hw()
3423 hisi_sas_phy_write32(hisi_hba, i, CHL_INT1_MSK, 0xffffffff); in interrupt_disable_v2_hw()