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Searched refs:CGTS_SA0_QUAD0_SM_CTRL_REG__SM_MODE_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_0.c7839 reg_data &= ~CGTS_SA0_QUAD0_SM_CTRL_REG__SM_MODE_MASK; in gfx_v10_0_apply_medium_grain_clock_gating_workaround()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h35323 #define CGTS_SA0_QUAD0_SM_CTRL_REG__SM_MODE_MASK … macro