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Searched refs:CGTS_CU5_SP1_CTRL_REG__SP10__SHIFT (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h9862 #define CGTS_CU5_SP1_CTRL_REG__SP10__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h11586 #define CGTS_CU5_SP1_CTRL_REG__SP10__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h11984 #define CGTS_CU5_SP1_CTRL_REG__SP10__SHIFT 0x0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h24488 #define CGTS_CU5_SP1_CTRL_REG__SP10__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h25910 #define CGTS_CU5_SP1_CTRL_REG__SP10__SHIFT … macro
H A Dgc_9_1_sh_mask.h25779 #define CGTS_CU5_SP1_CTRL_REG__SP10__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h28295 #define CGTS_CU5_SP1_CTRL_REG__SP10__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h18200 #define CGTS_CU5_SP1_CTRL_REG__SP10__SHIFT … macro