Home
last modified time | relevance | path

Searched refs:CGTS_CU5_SP0_CTRL_REG__SP00__SHIFT (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h9812 #define CGTS_CU5_SP0_CTRL_REG__SP00__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h11536 #define CGTS_CU5_SP0_CTRL_REG__SP00__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h11934 #define CGTS_CU5_SP0_CTRL_REG__SP00__SHIFT 0x0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h24435 #define CGTS_CU5_SP0_CTRL_REG__SP00__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h25857 #define CGTS_CU5_SP0_CTRL_REG__SP00__SHIFT … macro
H A Dgc_9_1_sh_mask.h25726 #define CGTS_CU5_SP0_CTRL_REG__SP00__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h28242 #define CGTS_CU5_SP0_CTRL_REG__SP00__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h18147 #define CGTS_CU5_SP0_CTRL_REG__SP00__SHIFT … macro