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Searched refs:CGTS_CU0_TA_SQC_CTRL_REG__TA_MASK (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h9381 #define CGTS_CU0_TA_SQC_CTRL_REG__TA_MASK 0x7f macro
H A Dgfx_8_0_sh_mask.h11105 #define CGTS_CU0_TA_SQC_CTRL_REG__TA_MASK 0x7f macro
H A Dgfx_8_1_sh_mask.h11503 #define CGTS_CU0_TA_SQC_CTRL_REG__TA_MASK 0x7f macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h23992 #define CGTS_CU0_TA_SQC_CTRL_REG__TA_MASK … macro
H A Dgc_9_2_1_sh_mask.h25414 #define CGTS_CU0_TA_SQC_CTRL_REG__TA_MASK … macro
H A Dgc_9_1_sh_mask.h25283 #define CGTS_CU0_TA_SQC_CTRL_REG__TA_MASK … macro
H A Dgc_9_4_3_sh_mask.h27789 #define CGTS_CU0_TA_SQC_CTRL_REG__TA_MASK … macro
H A Dgc_9_4_2_sh_mask.h17799 #define CGTS_CU0_TA_SQC_CTRL_REG__TA_MASK … macro