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Searched refs:CGTS_CU0_TA_SQC_CTRL_REG__SQC_MASK (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h9391 #define CGTS_CU0_TA_SQC_CTRL_REG__SQC_MASK 0x7f0000 macro
H A Dgfx_8_0_sh_mask.h11115 #define CGTS_CU0_TA_SQC_CTRL_REG__SQC_MASK 0x7f0000 macro
H A Dgfx_8_1_sh_mask.h11513 #define CGTS_CU0_TA_SQC_CTRL_REG__SQC_MASK 0x7f0000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h23997 #define CGTS_CU0_TA_SQC_CTRL_REG__SQC_MASK … macro
H A Dgc_9_2_1_sh_mask.h25419 #define CGTS_CU0_TA_SQC_CTRL_REG__SQC_MASK … macro
H A Dgc_9_1_sh_mask.h25288 #define CGTS_CU0_TA_SQC_CTRL_REG__SQC_MASK … macro
H A Dgc_9_4_3_sh_mask.h27794 #define CGTS_CU0_TA_SQC_CTRL_REG__SQC_MASK … macro
H A Dgc_9_4_2_sh_mask.h17804 #define CGTS_CU0_TA_SQC_CTRL_REG__SQC_MASK … macro