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Searched refs:CE1_CORE_RESET (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/include/dt-bindings/reset/
H A Dqcom,gcc-mdm9615.h61 #define CE1_CORE_RESET 50 macro
H A Dqcom,gcc-msm8960.h59 #define CE1_CORE_RESET 50 macro
H A Dqcom,gcc-ipq806x.h56 #define CE1_CORE_RESET 47 macro
/openbmc/linux/drivers/clk/qcom/
H A Dgcc-mdm9615.c1691 [CE1_CORE_RESET] = { 0x2724, 7 },
H A Dgcc-msm8960.c3417 [CE1_CORE_RESET] = { 0x2724, 7 },
3632 [CE1_CORE_RESET] = { 0x2724, 7 },
H A Dgcc-ipq806x.c3244 [CE1_CORE_RESET] = { 0x2724, 7 },