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Searched refs:CCM_PLL5_DIV2_SHIFT (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-sunxi/
H A Dclock_sun8i_a83t.c116 div2 << CCM_PLL5_DIV2_SHIFT | in clock_set_pll5()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dclock_sun8i_a83t.h170 #define CCM_PLL5_DIV2_SHIFT 18 macro