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Searched refs:CCM_CCGR4 (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/drivers/clk/imx/
H A Dclk-vf610.c32 #define CCM_CCGR4 (ccm_base + 0x50) macro
282 clk[VF610_CLK_WKPU] = imx_clk_gate2_cgr("wkpu", "ipg_bus", CCM_CCGR4, CCM_CCGRx_CGn(10), 0x2); in vf610_clocks_init()
322 clk[VF610_CLK_I2C0] = imx_clk_gate2("i2c0", "ipg_bus", CCM_CCGR4, CCM_CCGRx_CGn(6)); in vf610_clocks_init()
323 clk[VF610_CLK_I2C1] = imx_clk_gate2("i2c1", "ipg_bus", CCM_CCGR4, CCM_CCGRx_CGn(7)); in vf610_clocks_init()
385 clk[VF610_CLK_ESAI] = imx_clk_gate2("esai", "esai_div", CCM_CCGR4, CCM_CCGRx_CGn(2)); in vf610_clocks_init()
428 clk[VF610_CLK_ASRC] = imx_clk_gate2("asrc", "ipg_bus", CCM_CCGR4, CCM_CCGRx_CGn(1)); in vf610_clocks_init()
/openbmc/u-boot/board/aristainetos/
H A Dclocks2.cfg21 DATA 4, CCM_CCGR4, 0xfffff300
H A Dclocks.cfg21 DATA 4, CCM_CCGR4, 0xfffff30c /* enable NAND/GPMI/BCH clocks */
/openbmc/u-boot/board/advantech/dms-ba16/
H A Dclocks.cfg6 DATA 4, CCM_CCGR4, 0x00FFF300
/openbmc/u-boot/board/tqc/tqma6/
H A Dclocks.cfg15 DATA 4, CCM_CCGR4, 0x00FFF300
/openbmc/u-boot/board/boundary/nitrogen6x/
H A Dclocks.cfg21 DATA 4, CCM_CCGR4, 0x00FFF300
/openbmc/u-boot/board/toradex/apalis_imx6/
H A Dclocks.cfg22 DATA 4, CCM_CCGR4, 0x00FFF300
/openbmc/u-boot/board/toradex/colibri_imx6/
H A Dclocks.cfg22 DATA 4, CCM_CCGR4, 0x00FFF300
/openbmc/qemu/include/hw/misc/
H A Dimx6_ccm.h45 #define CCM_CCGR4 30 macro
H A Dimx6ul_ccm.h44 #define CCM_CCGR4 30 macro
/openbmc/qemu/hw/misc/
H A Dimx6ul_ccm.c50 [CCM_CCGR4] = 0x00000000,
137 case CCM_CCGR4: in imx6ul_ccm_reg_name()
569 s->ccm[CCM_CCGR4] = 0xFFFFFFFF; in imx6ul_ccm_reset()
H A Dimx6_ccm.c79 case CCM_CCGR4: in imx6_ccm_reg_name()
414 s->ccm[CCM_CCGR4] = 0xFFFFFFFF; in imx6_ccm_reset()
/openbmc/u-boot/board/ge/bx50v3/
H A Dbx50v3.cfg131 DATA 4, CCM_CCGR4, 0x00FFF300
/openbmc/u-boot/board/tbs/tbs2910/
H A Dtbs2910.cfg20 DATA 4, CCM_CCGR4, 0x00FFF300
/openbmc/u-boot/board/seco/mx6quq7/
H A Dmx6quq7-2g.cfg162 DATA 4, CCM_CCGR4, 0x00FFF300
/openbmc/u-boot/board/barco/titanium/
H A Dimximage.cfg158 DATA 4, CCM_CCGR4, 0xFFFFF300 /* enable NAND/GPMI/BCH clocks */
/openbmc/u-boot/arch/arm/include/asm/arch-mx6/
H A Dcrm_regs.h14 #define CCM_CCGR4 0x020C4078 macro