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Searched refs:CB_BLEND5_CONTROL__ALPHA_COMB_FCN__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h119 #define CB_BLEND5_CONTROL__ALPHA_COMB_FCN__SHIFT 0x00000015 macro
H A Dgfx_7_2_sh_mask.h140 #define CB_BLEND5_CONTROL__ALPHA_COMB_FCN__SHIFT 0x15 macro
H A Dgfx_8_0_sh_mask.h146 #define CB_BLEND5_CONTROL__ALPHA_COMB_FCN__SHIFT 0x15 macro
H A Dgfx_8_1_sh_mask.h148 #define CB_BLEND5_CONTROL__ALPHA_COMB_FCN__SHIFT 0x15 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h16677 #define CB_BLEND5_CONTROL__ALPHA_COMB_FCN__SHIFT macro
H A Dgc_9_2_1_sh_mask.h17861 #define CB_BLEND5_CONTROL__ALPHA_COMB_FCN__SHIFT macro
H A Dgc_9_1_sh_mask.h17986 #define CB_BLEND5_CONTROL__ALPHA_COMB_FCN__SHIFT macro
H A Dgc_9_4_3_sh_mask.h19987 #define CB_BLEND5_CONTROL__ALPHA_COMB_FCN__SHIFT macro
H A Dgc_9_4_2_sh_mask.h10108 #define CB_BLEND5_CONTROL__ALPHA_COMB_FCN__SHIFT macro
H A Dgc_11_0_0_sh_mask.h21905 #define CB_BLEND5_CONTROL__ALPHA_COMB_FCN__SHIFT macro
H A Dgc_11_0_3_sh_mask.h24235 #define CB_BLEND5_CONTROL__ALPHA_COMB_FCN__SHIFT macro
H A Dgc_10_1_0_sh_mask.h24191 #define CB_BLEND5_CONTROL__ALPHA_COMB_FCN__SHIFT macro
H A Dgc_10_3_0_sh_mask.h22382 #define CB_BLEND5_CONTROL__ALPHA_COMB_FCN__SHIFT macro