Searched refs:CAIL_PCIE_LINK_WIDTH_SUPPORT_X1 (Results 1 – 9 of 9) sorted by relevance
52 #define CAIL_PCIE_LINK_WIDTH_SUPPORT_X1 0x00010000 macro62 #define AMDGPU_DEFAULT_PCIE_MLW_MASK (CAIL_PCIE_LINK_WIDTH_SUPPORT_X1 \
87 case CAIL_PCIE_LINK_WIDTH_SUPPORT_X1: in get_pcie_lane_support()
5545 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); in amdgpu_device_get_pcie_info()5553 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); in amdgpu_device_get_pcie_info()5560 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); in amdgpu_device_get_pcie_info()5566 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); in amdgpu_device_get_pcie_info()5571 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); in amdgpu_device_get_pcie_info()5575 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); in amdgpu_device_get_pcie_info()5578 adev->pm.pcie_mlw_mask = CAIL_PCIE_LINK_WIDTH_SUPPORT_X1; in amdgpu_device_get_pcie_info()
581 case CAIL_PCIE_LINK_WIDTH_SUPPORT_X1: in amdgpu_amdkfd_get_pcie_bandwidth_mbytes()
1380 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in smu_smc_hw_setup()
523 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in vega12_override_pcie_parameters()
869 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in vega20_override_pcie_parameters()
1545 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in vega10_override_pcie_parameters()
628 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) in smu7_override_pcie_width()