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Searched refs:CACHELINE_ALIGNED_DATA (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/arch/mips/kernel/
H A Dvmlinux.lds.S96 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
/openbmc/linux/arch/ia64/kernel/
H A Dvmlinux.lds.S180 CACHELINE_ALIGNED_DATA(SMP_CACHE_BYTES)
/openbmc/linux/arch/x86/kernel/
H A Dvmlinux.lds.S181 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
/openbmc/linux/include/asm-generic/
H A Dvmlinux.lds.h386 #define CACHELINE_ALIGNED_DATA(align) \ macro
1101 CACHELINE_ALIGNED_DATA(cacheline) \
/openbmc/linux/arch/powerpc/kernel/
H A Dvmlinux.lds.S382 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)