Searched refs:C10_PLL15_TXCLKDIV_MASK (Results 1 – 2 of 2) sorted by relevance
147 #define C10_PLL15_TXCLKDIV_MASK REG_GENMASK8(2, 0) macro
1891 tx_clk_div = REG_FIELD_GET8(C10_PLL15_TXCLKDIV_MASK, hw_state->pll[15]); in intel_c10pll_dump_hw_state()2352 tx_clk_div = REG_FIELD_GET8(C10_PLL15_TXCLKDIV_MASK, pll_state->pll[15]); in intel_c10pll_calc_port_clock()