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Searched refs:BXT_P_CR_GT_DISP_PWRON (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Ddisplay.c234 vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) &= ~(BIT(0) | BIT(1)); in emulate_monitor_status_change()
268 vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) |= BIT(1); in emulate_monitor_status_change()
297 vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) |= BIT(0); in emulate_monitor_status_change()
327 vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) |= BIT(0); in emulate_monitor_status_change()
H A Dmmio.c262 vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) &= in intel_vgpu_reset_mmio()
H A Dhandlers.c2753 MMIO_DH(BXT_P_CR_GT_DISP_PWRON, D_BXT, NULL, bxt_gt_disp_pwron_write); in init_bxt_mmio_info()
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_dpio_phy.c331 if (!(intel_de_read(dev_priv, BXT_P_CR_GT_DISP_PWRON) & phy_info->pwron_mask)) in bxt_ddi_phy_is_enabled()
392 intel_de_rmw(dev_priv, BXT_P_CR_GT_DISP_PWRON, 0, phy_info->pwron_mask); in _bxt_ddi_phy_init()
460 intel_de_rmw(dev_priv, BXT_P_CR_GT_DISP_PWRON, phy_info->pwron_mask, 0); in bxt_ddi_phy_uninit()
H A Dvlv_dsi.c751 intel_de_rmw(dev_priv, BXT_P_CR_GT_DISP_PWRON, 0, MIPIO_RST_CTRL); in intel_dsi_pre_enable()
909 intel_de_rmw(dev_priv, BXT_P_CR_GT_DISP_PWRON, MIPIO_RST_CTRL, 0); in intel_dsi_post_disable()
/openbmc/linux/drivers/gpu/drm/i915/
H A Dintel_gvt_mmio_table.c1121 MMIO_D(BXT_P_CR_GT_DISP_PWRON); in iterate_bxt_mmio()
H A Di915_reg.h561 #define BXT_P_CR_GT_DISP_PWRON _MMIO(0x138090) macro