Home
last modified time | relevance | path

Searched refs:BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_BITCNT_MASK (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h1755 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_BITCNT_MASK 0x000f0000L macro
H A Ddce_8_0_sh_mask.h3249 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_BITCNT_MASK 0xf0000 macro
H A Ddce_10_0_sh_mask.h3171 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_BITCNT_MASK 0xf0000 macro
H A Ddce_11_0_sh_mask.h3241 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_BITCNT_MASK 0xf0000 macro
H A Ddce_11_2_sh_mask.h3489 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_BITCNT_MASK 0xf0000 macro
H A Ddce_12_0_sh_mask.h9323 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_BITCNT_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h21322 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_BITCNT_MASK … macro
H A Ddcn_2_1_0_sh_mask.h43308 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_BITCNT_MASK … macro
H A Ddcn_1_0_sh_mask.h40074 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_BITCNT_MASK … macro
H A Ddcn_3_2_1_sh_mask.h41941 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_BITCNT_MASK … macro
H A Ddcn_3_0_2_sh_mask.h42592 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_BITCNT_MASK … macro
H A Ddcn_2_0_0_sh_mask.h48817 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_BITCNT_MASK … macro
H A Ddcn_3_0_0_sh_mask.h49188 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_BITCNT_MASK … macro
H A Ddcn_3_2_0_sh_mask.h41893 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_BITCNT_MASK … macro