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Searched refs:BL_PWM_CNTL__BL_PWM_FRACTIONAL_EN_MASK (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h1741 #define BL_PWM_CNTL__BL_PWM_FRACTIONAL_EN_MASK 0x40000000L macro
H A Ddce_8_0_sh_mask.h3235 #define BL_PWM_CNTL__BL_PWM_FRACTIONAL_EN_MASK 0x40000000 macro
H A Ddce_10_0_sh_mask.h3157 #define BL_PWM_CNTL__BL_PWM_FRACTIONAL_EN_MASK 0x40000000 macro
H A Ddce_11_0_sh_mask.h3227 #define BL_PWM_CNTL__BL_PWM_FRACTIONAL_EN_MASK 0x40000000 macro
H A Ddce_11_2_sh_mask.h3475 #define BL_PWM_CNTL__BL_PWM_FRACTIONAL_EN_MASK 0x40000000 macro
H A Ddce_12_0_sh_mask.h9310 #define BL_PWM_CNTL__BL_PWM_FRACTIONAL_EN_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h21307 #define BL_PWM_CNTL__BL_PWM_FRACTIONAL_EN_MASK … macro
H A Ddcn_2_1_0_sh_mask.h43295 #define BL_PWM_CNTL__BL_PWM_FRACTIONAL_EN_MASK … macro
H A Ddcn_3_2_1_sh_mask.h41926 #define BL_PWM_CNTL__BL_PWM_FRACTIONAL_EN_MASK … macro
H A Ddcn_1_0_sh_mask.h40061 #define BL_PWM_CNTL__BL_PWM_FRACTIONAL_EN_MASK … macro
H A Ddcn_3_0_2_sh_mask.h42577 #define BL_PWM_CNTL__BL_PWM_FRACTIONAL_EN_MASK … macro
H A Ddcn_3_0_0_sh_mask.h49173 #define BL_PWM_CNTL__BL_PWM_FRACTIONAL_EN_MASK … macro
H A Ddcn_2_0_0_sh_mask.h48804 #define BL_PWM_CNTL__BL_PWM_FRACTIONAL_EN_MASK … macro
H A Ddcn_3_2_0_sh_mask.h41878 #define BL_PWM_CNTL__BL_PWM_FRACTIONAL_EN_MASK … macro