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Searched refs:BL_PWM_CNTL__BL_PWM_EN__SHIFT (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h1740 #define BL_PWM_CNTL__BL_PWM_EN__SHIFT 0x0000001f macro
H A Ddce_8_0_sh_mask.h3238 #define BL_PWM_CNTL__BL_PWM_EN__SHIFT 0x1f macro
H A Ddce_10_0_sh_mask.h3160 #define BL_PWM_CNTL__BL_PWM_EN__SHIFT 0x1f macro
H A Ddce_11_0_sh_mask.h3230 #define BL_PWM_CNTL__BL_PWM_EN__SHIFT 0x1f macro
H A Ddce_11_2_sh_mask.h3478 #define BL_PWM_CNTL__BL_PWM_EN__SHIFT 0x1f macro
H A Ddce_12_0_sh_mask.h9308 #define BL_PWM_CNTL__BL_PWM_EN__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h21305 #define BL_PWM_CNTL__BL_PWM_EN__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h43293 #define BL_PWM_CNTL__BL_PWM_EN__SHIFT … macro
H A Ddcn_1_0_sh_mask.h40059 #define BL_PWM_CNTL__BL_PWM_EN__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h41921 #define BL_PWM_CNTL__BL_PWM_EN__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h42575 #define BL_PWM_CNTL__BL_PWM_EN__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h48802 #define BL_PWM_CNTL__BL_PWM_EN__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h49171 #define BL_PWM_CNTL__BL_PWM_EN__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h41873 #define BL_PWM_CNTL__BL_PWM_EN__SHIFT … macro