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Searched refs:BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT__SHIFT (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h1738 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT__SHIFT 0x00000000 macro
H A Ddce_8_0_sh_mask.h3234 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT__SHIFT 0x0 macro
H A Ddce_10_0_sh_mask.h3156 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT__SHIFT 0x0 macro
H A Ddce_11_0_sh_mask.h3226 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT__SHIFT 0x0 macro
H A Ddce_11_2_sh_mask.h3474 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT__SHIFT 0x0 macro
H A Ddce_12_0_sh_mask.h9306 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT__SHIFT macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h21303 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT__SHIFT macro
H A Ddcn_2_1_0_sh_mask.h43291 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT__SHIFT macro
H A Ddcn_1_0_sh_mask.h40057 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT__SHIFT macro
H A Ddcn_3_2_1_sh_mask.h41916 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT__SHIFT macro
H A Ddcn_3_0_2_sh_mask.h42573 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT__SHIFT macro
H A Ddcn_2_0_0_sh_mask.h48800 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT__SHIFT macro
H A Ddcn_3_0_0_sh_mask.h49169 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT__SHIFT macro
H A Ddcn_3_2_0_sh_mask.h41868 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT__SHIFT macro