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Searched refs:BIF_CFG_DEV0_RC1_SLOT_CNTL__PWR_CONTROLLER_CNTL__SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_4_3_0_sh_mask.h63596 #define BIF_CFG_DEV0_RC1_SLOT_CNTL__PWR_CONTROLLER_CNTL__SHIFT … macro
H A Dnbio_7_0_sh_mask.h31704 #define BIF_CFG_DEV0_RC1_SLOT_CNTL__PWR_CONTROLLER_CNTL__SHIFT … macro
H A Dnbio_7_7_0_sh_mask.h133554 #define BIF_CFG_DEV0_RC1_SLOT_CNTL__PWR_CONTROLLER_CNTL__SHIFT … macro
H A Dnbio_7_2_0_sh_mask.h127251 #define BIF_CFG_DEV0_RC1_SLOT_CNTL__PWR_CONTROLLER_CNTL__SHIFT … macro