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Searched refs:BIF_CFG_DEV0_EPF0_0_DEVICE_CAP__FLR_CAPABLE_MASK (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_sh_mask.h2295 #define BIF_CFG_DEV0_EPF0_0_DEVICE_CAP__FLR_CAPABLE_MASK … macro
26535 #define BIF_CFG_DEV0_EPF0_0_DEVICE_CAP__FLR_CAPABLE_MASK … macro
H A Dnbio_7_9_0_sh_mask.h8725 #define BIF_CFG_DEV0_EPF0_0_DEVICE_CAP__FLR_CAPABLE_MASK … macro
H A Dnbio_4_3_0_sh_mask.h11306 #define BIF_CFG_DEV0_EPF0_0_DEVICE_CAP__FLR_CAPABLE_MASK … macro
H A Dnbio_2_3_sh_mask.h4873 #define BIF_CFG_DEV0_EPF0_0_DEVICE_CAP__FLR_CAPABLE_MASK … macro
H A Dnbio_6_1_sh_mask.h1826 #define BIF_CFG_DEV0_EPF0_0_DEVICE_CAP__FLR_CAPABLE_MASK … macro
H A Dnbio_7_7_0_sh_mask.h47276 #define BIF_CFG_DEV0_EPF0_0_DEVICE_CAP__FLR_CAPABLE_MASK … macro
H A Dnbio_7_2_0_sh_mask.h50832 #define BIF_CFG_DEV0_EPF0_0_DEVICE_CAP__FLR_CAPABLE_MASK … macro